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  mp1470 high-efficiency, 2a, 16v, 500khz synchronous, step-down converter in a 6-pin tsot 23 mp1470 rev. 1.02 www.monolithicpower.com 1 8/27/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. the future of analog ic technology description the mp1470 is a high-frequency, synchronous, rectified, step-down, switch-mode converter with internal power mosfets. it offers a very compact solution to achieve a 2a continuous output current over a wide input supply range, with excellent load and line regulation. the mp1470 has synchronous-mode operation for higher efficiency over the output current-load range. current-mode operation provides fast transient response and eases loop stabilization. protection features include over-current protection and thermal shutdown. the mp1470 requires a minimal number of readily-available, standard, external components and is available in a space-saving 6-pin tsot23 package. features ? wide 4.7v-to-16v operating input range ? 163m ? /86m ? low-r ds(on) internal power mosfets ? proprietary switching-loss?reduction technique ? high-efficiency synchronous-mode operation ? fixed 500khz switching frequency ? internal aam power-save mode for high efficiency at light load ? internal soft-start ? over-current protection and hiccup ? thermal shutdown ? output adjustable from 0.8v ? available in a 6-pin tsot-23 package applications ? game consoles ? digital set-top boxes ? flat-panel television and monitors ? general purposes all mps parts are lead-free and adhere to the rohs directive. for mps green status, please visit mps website under products, quality assurance page. ?mps? and ?the future of analog ic technology? are registered trademarks of monolithic power systems, inc. typical application vin r2 13k r1 40.2k r3 75k in u1 gnd mp1470 1 4 vout 2 6 3 5 en fb sw bst 3.3v/2a en gnd 50 55 60 65 70 75 80 85 90 95 100 0.01 0.1 1 10
mp1470 ? synchronous, step-down co nverter with internal mosfets mp1470 rev. 1.02 www.monolithicpower.com 2 8/27/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. ordering information part number* package top marking MP1470GJ tsot23-6 adj * for tape & reel, add suffix ?z (e.g. MP1470GJ?z); package reference top view 1 2 3 6 5 4 mp1470 bst sw in gnd fb en mp1470 absolute maxi mum ratings (1) v in ..................................................-0.3v to 17v v sw ...................................................................... -0.3v (-5v for <10ns) to 17v (19v for <10ns) v bs ......................................................... v sw +6v all other pins ...................................?0.3v to 6v continuous power dissipation (t a = +25c) (2) ........................................................... 1.25w junction temperature ...............................150c lead temperature ....................................260c storage temperature................. -65c to 150c recommended operating conditions (3) supply voltage v in ...........................4.7v to 16v output voltage v out ......................0.8v to 0.9v in operating junction temp. (t j ). -40c to +125c thermal resistance (4) ja jc tsot-23-6............................. 100 ..... 55... c/w notes: 1) exceeding these ratings may damage the device. 2) the maximum allowable power dissipation is a function of the maximum junction temperature t j (max), the junction-to- ambient thermal resistance ja , and the ambient temperature t a . the maximum allowable continuous power dissipation at any ambient temperature is calculated by p d (max) = (t j (max)-t a )/ ja . exceeding the maximum allowable powe r dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. internal thermal shutdown circuitry protects the device from permanent damage. 3) the device is not guaranteed to function outside of its operating conditions. 4) measured on jesd51-7, 4-layer pcb.
mp1470 ? synchronous, step-down co nverter with internal mosfets mp1470 rev. 1.02 www.monolithicpower.com 3 8/27/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. electrical characteristics (5) v in = 12v, t a = 25c, unless otherwise noted. parameter symbol condition min typ max units supply current (shutdown) i in v en = 0v 1 a supply current (quiescent) i q v en = 2v, v fb = 1v 0.83 ma hs switch-on resistance hs rds-on v bst-sw =5v 163 m ? ls switch-on resistance ls rds-on vcc=5v 86 m ? switch leakage sw lkg v en = 0v, v sw =12v 1 a current limit (5) i limit 3 3.7 a oscillator frequency f sw v fb =0.75v 400 490 580 khz maximum duty cycle d max v fb =700mv 88 92 % minimum on time (5) on_min 90 ns feedback voltage v fb 776 800 824 mv en rising threshold v en_rising 1.4 1.5 1.6 v en falling threshold v en_falling 1.23 1.32 1.41 v v en =2v 1.6 a en input current i en v en =0 0 a v in under-voltage lockout threshold?rising inuv vth 3.85 4.2 4.55 v v in under-voltage lockout threshold hysteresis inuv hys 340 mv soft-start period ss 1 ms thermal shutdown (5) 150 c thermal hysteresis (5) 20 c notes: 5) guaranteed by design.
mp1470 ? synchronous, step-down co nverter with internal mosfets mp1470 rev. 1.02 www.monolithicpower.com 4 8/27/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. typical performanc e characteristics v in = 12v, v out = 3.3v, l = 4.9h, t a = +25c, unless otherwise noted. 0 1
mp1470 ? synchronous, step-down co nverter with internal mosfets mp1470 rev. 1.02 www.monolithicpower.com 5 8/27/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. typical performanc e characteristics (continued) v in = 12v, v out = 3.3v, l = 4.9h, t a = +25c, unless otherwise noted. v out 2v/div. v sw 5v/div. v in 10v/div. i l 500ma/div. v out 2v/div. v sw 5v/div. v in 10v/div. i l 1a/div. v out 2v/div. v sw 10v/div. v en 2v/div. i l 1a/div. v out 2v/div. v sw 10v/div. v en 2v/div. i l 1a/div. v out/ac 50mv/div. v sw 10v/div. v in/ac 200mv/div. i l 1a/div. v out 2v/div. v sw 10v/div. v en 2v/div. i l 500ma/div. v out 2v/div. v sw 10v/div. v en 2v/div. i l 500ma/div. v out 2v/div. v sw 5v/div. v in 10v/div. i l 1a/div. v out 2v/div. v sw 5v/div. v in 10v/div. i l 200ma/div. startup through input voltage i out = 0a shutdown through input voltage i out = 0a startup through input voltage i out = 2a shutdown through input voltage i out = 2a startup through enable i out = 0a shutdown through enable i out = 0a startup through enable i out = 2a shutdown through enable i out = 2a input/output ripple i out = 2a
mp1470 ? synchronous, step-down co nverter with internal mosfets mp1470 rev. 1.02 www.monolithicpower.com 6 8/27/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. typical performanc e characteristics (continued) v in = 12v, v out = 3.3v, l = 4.9h, t a = +25c, unless otherwise noted.
mp1470 ? synchronous, step-down co nverter with internal mosfets mp1470 rev. 1.02 www.monolithicpower.com 7 8/27/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. pin functions package pin # name description 1 gnd system ground. reference ground of the regu lated output voltage: requires extra care during pcb layout. connect to gnd with copper traces and vias. 2 sw switch output. connect using a wide pcb trace. 3 in supply voltage. the mp1470 operates from a 4. 7v-to-16v input rail. requires c1 to decouple the input rail. connect using a wide pcb trace. 4 fb feedback. connect to the tap of an external resistor divider from the output to gnd to set the output voltage. the frequency fold-back co mparator lowers the oscillator frequency when the fb voltage drops below 140mv to prevent current-limit runaway during a short circuit fault. 5 en en=high to enable the mp1470. for automatic start-up, connect en to v in using a 100k ? resistor. 6 bst bootstrap. connect a capacitor and a resistor between sw and bs pins to form a floating supply across the high-side switch driver. use a 1f bst capacitor.
mp1470 ? synchronous, step-down co nverter with internal mosfets mp1470 rev. 1.02 www.monolithicpower.com 8 8/27/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. block diagram 47pf 1meg 6.5v bst rsen in oscillator vcc regulator bootstrap regulator currrent sense amplifer vcc current limit comparator error amplifier reference en fb + + - + - + - sw gnd ls driver hs driver comparator on time control logic control 1.2pf 500k 20k figure 1: functional block diagram
mp1470 ? synchronous, step-down co nverter with internal mosfets mp1470 rev. 1.02 www.monolithicpower.com 9 8/27/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. operation the mp1470 is a high-frequency, synchronous, rectified, step-down, switch-mode converter with internal power mosfets. it offers a very compact solution to achieve a 2a continuous output current over a wide input supply range, with excellent load and line regulation. the mp1470 operates in a fixed-frequency, peak-current?control mode to regulate the output voltage. an internal clock initiates the pwm cycle to turn on the integrated high-side power mosfet. this mosfet remains on until its current reaches the value set by the comp voltage. when the power switch is off, it remains off until the next clock cycle starts. if the current in the power mosfet does not reach the comp set current value within 90% of one pwm period, the power mosfet is forced to turn off. internal regulator the 5v internal regulator powers most of the internal circuits. this regulator takes v in and operates in the full v in range. when v in exceeds 5.0v, the regulator output is in full regulation. when v in falls below 5.0v, the output decreases. error amplifier the error amplifier compares the fb voltage against the internal 0.8v reference (ref) and outputs a current proportional to the difference between the two. this output current charges or discharges the internal compensation network to form the comp voltage, which is used to control the power mosfet current. the optimized internal compensation network minimizes the external component counts and simplifies the control-loop design. aam operation the mp1470 has aam (advanced asynchronous modulation) power-save mode for light load. the aam voltage is set at 0.5v internally. under the heavy load condition, the v comp is higher than v aam . when the clock goes high, the high-side power mosfet turns on and remains on until v ilsense reaches the value set by the comp voltage. the internal clock resets every time when v comp is higher than v aam . under the light load condition, the value of v comp is low. when v comp is less than v aam and v fb is less than v ref , v comp ramps up until it exceeds v aam . during this time, the internal clock is blocked, thus the mp1470 skips some pulses for pfm (pulse frequency modulation) mode and achieves the light load power save. v aam clock v out r1 1.2pf 47pf 500k 20k r2 v ref v fb v il sense v comp hs_driver - + + - qs r + - figure 2: simplified aam control logic when the load current is light, the inductor peak current is set internally to about 380ma for v in =12v, v out =3.3v, and l=6.5 h. the curve of inductor peak current vs. inductor is shown in figure 3. inductor peak current vs. inductor 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 01234567 figure 3: inductor peak current vs. inductor value enable en is a digital control pin that turns the regulator on and off: drive en high to turn on the regulator, drive it low to turn it off. an internal 1m ? resistor from en to gnd allows en to float to shut down the chip. the en pin is clamped internally using a 6.5v series-zener-diode as shown in figure 4. connecting the en input pin through a pullup
mp1470 ? synchronous, step-down co nverter with internal mosfets mp1470 rev. 1.02 www.monolithicpower.com 10 8/27/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. resistor to the v in voltage limits the en input current to less than 100 a. for example, with 12v connected to vin, r pullup (12v-6.5v) 100 a =55k ? connecting the en pin directly to a voltage source without any pullup resistor requires limiting the amplitude of the voltage source to 6v to prevent damage to the zener diode. en logic en gnd zener 6.5v-typ figure 4: 6.5v zener diode under-voltage lockout (uvlo) under-voltage lockout (uvlo) protects the chip from operating at an insufficient supply voltage. the mp1470 uvlo comparator monitors the output voltage of the internal regulator, vcc. the uvlo rising threshold is about 4.2v while its falling threshold is consistently 3.85v. internal soft-start soft-start prevents the converter output voltage from overshooting during startup. when the chip starts, the internal circuit generates a soft- start voltage (ss) that ramps up from 0v to 1.2v: when ss falls below the internal reference (ref), ss overrides ref so that the error amplifier uses ss as the reference; when ss exceeds ref, the error amplifier resumes using ref as its reference. the ss time is internally set to 1ms. over-current-protection and hiccup the mp1470 has a cycle-by-cycle over-current limit for when the inductor current peak value exceeds the set current-limit threshold. first, when the output voltage drops until fb falls below the under-voltage (uv) threshold (typically 140mv) to trigger a uv event, the mp1470 enters hiccup mode to periodically restart the part. this protection mode is especially useful when the output is dead- shorted to ground. this greatly reduces the average short-circuit current to alleviate thermal issues and to protect the regulator. the mp1470 exits hiccup mode once the over- current condition is removed. thermal shutdown thermal shutdown prevents the chip from operating at exceedingly high temperatures. when the silicon die temperature exceeds 150c, it shuts down the whole chip. when the temperature falls below its lower threshold (typically 130c) the chip is enabled again. floating driver and bootstrap charging an external bootstrap capacitor powers the floating power mosfet driver. this floating driver has its own uvlo protection, with a rising threshold of 2.2v and a hysteresis of 150mv. v in regulates the bootstrap capacitor voltage internally through d1, m1, r4, c4, l1 and c2 (figure 5). if (v in -v sw ) exceeds 5v, u2 will regulate m1 to maintain a 5v bst voltage across c4. u2 v in u1 5v d1 m1 r4 c4 sw l1 c2 v out figure 5: internal bootstrap charger start-up and shutdown circuit if both v in and en exceed their respective thresholds, the chip starts. the reference block starts first, generating stable reference voltage and currents, and then the internal regulator is enabled. the regulator provides a stable supply for the remaining circuits. three events can shut down the chip: en low, v in low, and thermal shutdown. the shutdown procedure starts by initially blocking the signaling path to avoid any fault triggering. the comp voltage and the internal supply rail are then pulled down. the floating driver is not subject to this shutdown command.
mp1470 ? synchronous, step-down co nverter with internal mosfets mp1470 rev. 1.02 www.monolithicpower.com 11 8/27/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. application information setting the output voltage the external resistor divider sets the output voltage. the feedback resistor r1 also sets the feedback-loop bandwidth through the internal compensation capacitor (see the typical application circuit). choose r1 around 10k ? , and r2with: out r1 r2 v 1 0.8v = ? use a t-type network for when v out is low. fb vout r1 rt r2 figure 6: t-type network table 1 lists the recommended t-type resistors value for common output voltages. table 1: resistor selection for common output voltages v out (v) r1 (k ? ) r2 (k ? ) rt (k ? ) 1.05 10(1%) 32.4(1%) 300(1%) 1.2 20.5(1%) 41.2(1%) 249(1%) 1.8 40.2(1%) 32.4(1%) 120(1%) 2.5 40.2(1%) 19.1(1%) 100(1%) 3.3 40.2(1%) 13(1%) 75(1%) 5 40.2(1%) 7.68(1%) 75(1%) selecting the inductor use a 1h-to-10h inductor with a dc current rating of at least 25% percent higher than the maximum load current for most applications. for highest efficiency, select an inductor with a dc resistance less than 15m ? . for most designs, derive the inductance value from the following equation. out in out 1 in l osc v(vv) l vif ? = where i l is the inductor ripple current. choose an inductor current approximately 30% of the maximum load current. the maximum inductor peak current is: 2 i i i l load ) max ( l + = under light-load conditions (below 100ma), use a larger inductor to improve efficiency. selecting the input capacitor the input current to the step-down converter is discontinuous, and therefore requires a capacitor to both supply the ac current to the step-down converter and maintain the dc input voltage. for the best performance, use low esr capacitors, such as ceramic capacitors with x5r or x7r dielectrics and small temperature coefficients. a 22f capacitor is sufficient for most applications. the input capacitor (c1) requires an adequate ripple current rating because it absorbs the input switching. estimate the rms current in the input capacitor with: ? ? ? ? ? ? ? ? ? = in out in out load 1 c v v 1 v v i i the worst-case condition occurs at v in = 2v out , where: 2 i i load 1 c = for simplification, choose an input capacitor with an rms current rating greater than half the maximum load current. the input capacitor can be electrolytic, tantalum, or ceramic. place a small, high-quality, ceramic capacitor (0.1 f) as close to the ic as possible when using electrolytic or tantalum capacitors. when using ceramic capacitors, make sure that they have enough capacitance to provide sufficient charge to prevent excessive input voltage ripple. estimate the input voltage ripple caused by the capacitance with: load out out in in sin iv v v1 fc1v v ?? = ? ?? ?? selecting the output capacitor the output capacitor (c2) maintains the dc output voltage. use ceramic, tantalum, or low- esr electrolytic capacitors. use low esr capacitors to limit the output voltage ripple. estimate the output voltage ripple with:
mp1470 ? synchronous, step-down co nverter with internal mosfets mp1470 rev. 1.02 www.monolithicpower.com 12 8/27/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. out out out esr s1 in s vv 1 v1r fl v 8fc2 ?? ?? = ? + ?? ?? ?? ?? where l 1 is the inductor value and r esr is the equivalent series resistance (esr) of the output capacitor. for ceramic capacitors, the capacitance dominates the impedance at the switching frequency and causes most of the output voltage ripple. for simplification, estimate the output voltage ripple with: out out out 2 in s1 vv v1 v 8f l c2 ?? =? ?? ?? for tantalum or electrolytic capacitors, the esr dominates the impedance at the switching frequency. for simplification, the output ripple can be approximated with: out out out esr in s1 vv v1r fl v ?? =? ?? ?? the characteristics of the output capacitor also affect the stability of the regulation system. the mp1470 can be optimized for a wide range of capacitance and esr values. external bootstrap diode an external bootstrap (bst) diode can enhance the efficiency of the regulator given the following applicable conditions: z v out is 5v or 3.3v; and z duty cycle is high: d= in out v v >65% connect the external bst diode from the output of voltage regulator to the bst pin, as shown in figure 7 mp1470 sw c out l 5v or 3.3v r4 external bst diode in4148 bst figure 7: optional external bootstrap diode for most applications, use an in4148 for the external bst diode is in4148, and a 1f capacitor for the bst capacitor. pc board layout pcb layout is very important to achieve stable operation. for best results, use the following guidelines and figure 8 as reference. 1) keep the connection between the input ground and gnd pin as short and wide as possible. 2) keep the connection between the input capacitor and in pin as short and wide as possible. 3) use short and direct feedback connections. place the feedback resistors and compensation components as close to the chip as possible. 4) route sw away from sensitive analog areas such as fb. c1 c6 c2 l1 r1 r2 r7 r6 c5 r4 c3 r5 1 2 3 456 v in gnd v out c2a c3 r3 c1 c1a c6 c2 c2 a l1 r8 r1 r2 r7 c7 r3 c3 r6 c5 r4 c4 r5 1 2 3 456 v in gnd figure 8: sample board layout
mp1470 ? synchronous, step-down co nverter with internal mosfets mp1470 rev. 1.02 www.monolithicpower.com 13 8/27/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. design example below is a design example following the application guidelines for the specifications: table 2: design example v in 12v v out 3.3v i o 2a the detailed application schematics are shown in figures 9 through 13. the typical performance and circuit waveforms have been shown in the typical performance characteristics section. for more device applications, please refer to the related evaluation board datasheets.
mp1470 ? synchronous, step-down co nverter with internal mosfets mp1470 rev. 1.02 www.monolithicpower.com 14 8/27/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. typical application circuits 25v c1 c6 25v gnd gnd gnd gnd gnd gnd gnd en vout vin 100k r5 ns r6 c4 c2a ns c2 ns c3 l1 sw ns r3 40.2k r1 7.68k r2 gnd gnd gnd gnd 75k r7 5v/2a 3 5 6 2 4 1 ns c5 0r r4 mp1470 bst sw in gnd fb en figure 9: 12vin, 5v/2a 25v c1 c6 25v gnd gnd gnd gnd gnd gnd gnd en vout vin 100k r5 ns r6 c4 c2a ns c2 ns c3 l1 sw ns r3 40.2k r1 13k r2 gnd gnd gnd gnd 75k r7 3.3v/2a mp1470 3 5 6 2 4 1 bst sw in gnd fb en ns c5 0r r4 figure 10: 12vin, 3.3v/2a 25v c1 c6 25v gnd gnd gnd gnd gnd gnd gnd en vout vin 100k r5 ns r6 c4 c2a ns c2 ns c3 l1 sw ns r3 40.2k r1 19.1k r2 gnd gnd gnd gnd 100k r7 2.5v/2a mp1470 3 5 6 2 4 1 bst sw in gnd fb en ns c5 0r r4 figure 11: 12vin, 2.5v/2a
mp1470 ? synchronous, step-down co nverter with internal mosfets mp1470 rev. 1.02 www.monolithicpower.com 15 8/27/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. 25v c1 c6 25v gnd gnd gnd gnd gnd gnd gnd en vout vin 100k r5 ns r6 c4 c2a ns c2 ns c3 l1 sw ns r3 40.2k r1 32.4k r2 gnd gnd gnd gnd 120k r7 1.8v/2a mp1470 3 5 6 2 4 1 bst sw in gnd fb en ns c5 0r r4 figure 12: 12vin, 1.8v/2a 25v c1 c6 25v gnd gnd gnd gnd gnd gnd gnd en vout vin 100k r5 ns r6 c4 c2a ns c2 ns c3 l1 sw ns r3 20.5k r1 41.2k r2 gnd gnd gnd gnd 249k r7 1.2v/2a mp1470 3 5 6 2 4 1 bst sw in gnd fb en ns c5 0r r4 figure 13: 12vin, 1.2v/2a
mp1470 ? synchronous, step-down co nverter with internal mosfets notice: the information in this document is subject to change wi thout notice. users should warra nt and guarantee that third party intellectual property rights are not infringed upon w hen integrating mps products into any application. mps will not assume any legal responsibility for any said applications. mp1470 rev. 1.02 www.monolithicpower.com 16 8/27/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. package information tsot23-6 front view note: 1) all dimensions are in millimeters . 2) package length does not include mold flash , protrusion or gate burr . 3) package width does not include interlead flash or protrusion. 4) lead coplanarity (bottom of leads after forming ) shall be 0.10 millimeters max. 5) drawing conforms to jedec mo -193, variation ab . 6) drawing is not to scale . 7) pin 1 is lower left pin when reading top mark from left to right, (see example top mark ) top view recommended land pattern seating plane side view detail "a" see detail ''a'' iaaaa pin 1 id see note 7 example top mark


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